Hi
i guess there is a subtract operation in CMP instruction, which may set
the OF, but i can't tell more.
This is a discussion on Overflow flag - ASM x86 ASM 370 ; Hi, I've some problems understanding the CMP instruction together with a JG instruction (on a x86 processor). Basically, the question concerns the setting of the flag register: My code snippet: cmp ecx, edx jg my_label Due to the x86 manual, ...
Hi,
I've some problems understanding the CMP instruction together
with a JG instruction (on a x86 processor).
Basically, the question concerns the setting of the flag register:
My code snippet:
cmp ecx, edx
jg my_label
Due to the x86 manual, JG performs the jump when the following condition
meets:
(ZF = 0 AND SF=OF) [ZF = zero flag, SF = sign flag, OF = overflow flag]
I don't understand when the OF bit is set by the CMP instruction:
1) ecx = 5; edx = 2 => ZF = 0, OF = 0, SF = 0 (got it)
2) ecx = 2; edx = 5 => ZF = 0, OF = ?, SF = 1
OF must be 0 but why? When exactly is OF set?
And when is the carry flag set?
Thank you.
Chris
Hi
i guess there is a subtract operation in CMP instruction, which may set
the OF, but i can't tell more.
Christian Christmann wrote:
> I've some problems understanding the CMP instruction together
> with a JG instruction (on a x86 processor).
>
> Basically, the question concerns the setting of the flag register:
>
> My code snippet:
> cmp ecx, edx
> jg my_label
>
> Due to the x86 manual, JG performs the jump when the following condition
> meets:
> (ZF = 0 AND SF=OF) [ZF = zero flag, SF = sign flag, OF = overflow flag]
>
> I don't understand when the OF bit is set by the CMP instruction:
> 1) ecx = 5; edx = 2 => ZF = 0, OF = 0, SF = 0 (got it)
> 2) ecx = 2; edx = 5 => ZF = 0, OF = ?, SF = 1
> OF must be 0 but why? When exactly is OF set?
> And when is the carry flag set?
AMD64 General-Purpose and System Instructions
http://www.amd.com/us-en/assets/cont...docs/24594.pdf
CMP Compare
Compares the contents of a register or memory location (first operand)
with an immediate value or the contents of a register or memory location
(second operand), and sets or clears the status flags in the rFLAGS
register to reflect the results. To perform the comparison, the
instruction subtracts the second operand from the first operand and sets
the status flags in the same manner as the SUB instruction, but does not
alter the first operand. If the second operand is an immediate value,
the instruction sign-extends the value to the length of the first operand.
Use the CMP instruction to set the condition codes for a subsequent
conditional jump (Jcc), conditional move (CMOVcc), or conditional SETcc
instruction.
When interpreting operands as unsigned, flag settings are as follows:
Operands CF ZF
dest > source 0 0
dest = source 0 1
dest < source 1 0
When interpreting operands as signed, flag settings are as follows:
Operands OF ZF
dest > source SF 0
dest = source 0 1
dest < source NOT SF 0