Reffering memory address

Guys i just want to verify whether i am correct. The address in the
memory is reffered as segmentffset.The "segment" number is stored in
any segment registers like ss, ds,cs,es and the the number of
"offset" stored in any register like si,di,bp,sp .Am i right????
And what does this mean .What is the use of brackets

Am Sun, 31 Aug 2008 04:56:06 -0700 (PDT) schrieb palbodhisattwa2016:

> Guys i just want to verify whether i am correct. The address in the
> memory is reffered as segmentffset.The "segment" number is stored in
> any segment registers like ss, ds,cs,es and the the number of
> "offset" stored in any register like si,di,bp,sp .Am i right????
> And what does this mean .What is the use of brackets
>

Code:

mov al,[bx]

The same operation with ss:bp.

...

The difference between an operation with or without those brackets
shows these both examples below:

mov ax, [bx]

This works in the same way like the other examples above, but with a
loading of two bytes(one word) from a memmory location in ds:bx.

mov ax, bx

This instruction load the word in bx and store it in ax without any
memory access to get this value.

Dirk

palbodhisattwa2016 <spamtrap@crayne.org> writes:
> Guys i just want to verify whether i am correct. The address in the
> memory is reffered as segmentffset.The "segment" number is stored in
> any segment registers like ss, ds,cs,es and the the number of
> "offset" stored in any register like si,di,bp,sp .Am i right????

What did a search for ``x86 segment offset'' yield?
You really will find that search engines can answer such
simple questions far quicker than newsgroups.

> And what does this mean .What is the use of brackets
> [code]mov al,[bx]

This isn't a web forum, don't waste time with silly '

Many assemblers use the brackets to indicate that the
thing in brackets is being used as an address in memory,
almost always in order to actually fetch something from,
or write something to, memory.

So the first example will pull a 16 bit value from the
address pointed to by bx, and the latter an 8 bit value
from the address pointed to by bp.

These addresses don't have to be just simple registers,
but can be computed by scaling and adding registers,
e.g. [ebp+esi*4].

IIRC the only instructions which uses the bracket notation
without actually accessing the memory is the 'load effective
address' family. LEA etc.

Phil
--
The fact that a believer is happier than a sceptic is no more to the
point than the fact that a drunken man is happier than a sober one.
The happiness of credulity is a cheap and dangerous quality.
-- George Bernard Shaw (1856-1950), Preface to Androcles and the Lion

On Aug 31, 4:56 am, palbodhisattwa2016 <spamt...@crayne.org> wrote:
> Guys i just want to verify whether i am correct. The address in the
> memory is reffered as segmentffset.The "segment" number is stored in
> any segment registers like ss, ds,cs,es

Some instructions (very few) take the segment value from the memory
instead of a register:
LDS reg, [mem] -- loads DS:reg with a far pointer from the memory
JMP FAR segffs -- far jump to an instruction at segffs
etc

> and the the number of
> "offset" stored in any register like si,di,bp,sp .Am i right????

In 16-bit modes you usually only use bx, bp, si and di to address
memory operands and you don't use for that ax, cx and dx (and sp
unless it's a PUSH/POP-like instruction). In the 32-bit mode (or 16-
bit mode with the address size override prefix 067h) you can use
pretty much any register for an offset (including esp). In the 64-bit
mode you have even more registers for that (and rip-relative
addressing as well).
Now, there're memory operand encodings that take more than just one
register to represent the offset. In 16-bit modes (or 32-bit mode with
the address size override prefix 067h):
[bx+si]
[bx+di]
[bp+si]
[bp+di]
[bx+si+constant]
[bx+di+constant]
[bp+si+constant]
[bp+di+constant]
The final offset is the sum of all those things in the brackets. In 32-
bit and 64-bit modes there're many more encodings, e.g.:
[eax+ebx*4+constant]
And if we remember about the bit instructions such as BTR, then the
actual offset can be composed of even more components:
BTR mem, reg/imm
offset = reg/imm + offset from the regular ModR/M encoding. In other
words it can be as complex as [eax+ebx*4+constant+ecx/constant2].

Alex