DRC Coprocessors and hardware support for dynamic languages - Smalltalk

On Mon, 24 Apr 2006 17:29:07 -0500, Matthew D. Swank wrote:

> In a thread on comp.lang.smalltalk (http://makeashorterlink.com/?F21C3420D)
> last year there was an extensive discussion about hardware features that
> would be beneficial to dynamic languages like Smalltalk and Lisp.
>
> The Register (http://www.theregister.co.uk/) recently posted an article on
> a company the manufactures reprogrammable coprocessors that fit directly
> into Opteron sockets
> (http://www.theregister.co.uk/2006/04...c_fpga_module/).
>
> I was wondering if using this kind of technology would be a relatively
> cost effective way to do the kind of microcoding that the old Altos and
> Lisp Machines did?

The technology (FPGAs) is very cost effective and the development tools
have become pretty good. You will never be able to compete with languages
compiled for a modern X86/AMD64/PPC CPU, but could probably match current
embedded processors both in terms of speed and of power consumption.

The only example that I know of a microcoded CPU targeted at FPGAs is JOP
<http://www.jopdesign.org>. If you compile it for the same (expensive)
chips that DRC are using you can clock it up to 150MHz.

Now that there are several working emulators for some of the microcoded
lisp machines it should be easier to write a Verilor or VHDL version.

Robert Swindells

On Tue, 25 Apr 2006 01:29:56 +0100, Robert Swindells wrote:

> Now that there are several working emulators for some of the microcoded
> lisp machines it should be easier to write a Verilor or VHDL version.

Does it have to be all or nothing? Is it feasible to work in concert
with the main processor and dedicate a coprocessor to something a little
more general-- like garbage collection?

Matt

"Matthew D. Swank" <akopa-is-very-much-like-my-mail-address@c.net> wrote:

>On Tue, 25 Apr 2006 01:29:56 +0100, Robert Swindells wrote:
>
>> Now that there are several working emulators for some of the microcoded
>> lisp machines it should be easier to write a Verilor or VHDL version.
>
>Does it have to be all or nothing? Is it feasible to work in concert
>with the main processor and dedicate a coprocessor to something a little
>more general-- like garbage collection?
>
>Matt

I'm not sure garbage collection is all that dynamic.. In fact, I'm sure
it's better if it's written in a highly optimized statically compiled
language. So how is this much different that just having two CPUS?

If you push all your performance bottlenecks down to C/C++ objects, then
even using the current architectures work very well.

Ian

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