VHDL help - vhdl

This is a discussion on VHDL help - vhdl ; hi everybody, I wondred if someone can help me. my problem that i can't have negatif numbers and Comma in the simulation .all numbers appears positive. for exemple (-1.23) appears 123. please if someone have any exapmle help me....

+ Reply to Thread
Results 1 to 2 of 2

VHDL help

  1. Default VHDL help

    hi everybody,
    I wondred if someone can help me.
    my problem that i can't have negatif numbers and Comma in the
    simulation .all numbers appears positive.
    for exemple (-1.23) appears 123.
    please if someone have any exapmle help me.

  2. Default Re: VHDL help

    FPGA wrote:

    > my problem that i can't have negatif numbers and Comma in the
    > simulation .all numbers appears positive.


    use ieee.math_real.all;

    works fine for simulation.
    example:
    http://groups.google.com/groups/search?q=cal_range_r

    -- Mike Treseler
+ Reply to Thread
« Use of both positive reference and negative reference of the same signal for Xilinx chips would cause additional LUT delay? | dual ported RAM - different aspect ratio »

Similar Threads

  1. VHDL or PCB?
    By Application Development in forum vhdl
    Replies: 2
    Last Post: 10-14-2007, 06:19 PM
  2. VHDL-2002 vs VHDL-93 vs VHDL-87?
    By Application Development in forum vhdl
    Replies: 1
    Last Post: 03-23-2007, 04:33 AM
  3. VHDL PLI
    By Application Development in forum vhdl
    Replies: 5
    Last Post: 03-18-2007, 07:49 AM
  4. VHDL-AMS?
    By Application Development in forum vhdl
    Replies: 11
    Last Post: 11-08-2006, 03:06 PM
  5. VHDL Standards Overview of Accellera VHDL 2006 Standard 3.0
    By Application Development in forum vhdl
    Replies: 0
    Last Post: 10-13-2006, 04:24 PM