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About LinkBackspsihodelia@googlemail.com wrote:
> Is it possible to have in a FSM one procedure-or-function for each
> state?
yes. See case TxState_v here:
http://home.comcast.net/~mike_treseler/uart.vhd
for a related example.
-- Mike Treseler
This is a discussion on FSM output functions in an array - vhdl ; Is it possible to have in a FSM one procedure-or-function for each state? It should make the program code easy to read. It will be also better to have an array of functions and call them according FSM state number. ...
FSM output functions in an array Is it possible to have in a FSM one procedure-or-function for each
state? It should make the program code easy to read. It will be also
better to have an array of functions and call them according FSM state
number. Do you have any idea how to implement this approach in VHDL?
Here is a vivid wishful pseudo-Python example:
def read(args):
do smth.
def write(args):
do smth.
...
function = [1:read, 2:write, 3:sleep, 4:wake]
next_state = [1:3, 2:3, 3:3, 4:1]
def FSM_states_switch:
state = next_state[state]
def FSM_output_function:
function[state](args)
Re: FSM output functions in an array psihodelia@googlemail.com wrote:
> Is it possible to have in a FSM one procedure-or-function for each
> state?
yes. See case TxState_v here:
http://home.comcast.net/~mike_treseler/uart.vhd
for a related example.
-- Mike Treseler
Re: FSM output functions in an array
<psihodelia@googlemail.com> wrote in message
news:1194363845.707476.133700@19g2000hsx.googlegroups.com...
> Is it possible to have in a FSM one procedure-or-function for each
> state?
Yes.
>It should make the program code easy to read. It will be also
> better to have an array of functions and call them according FSM state
> number.
You can't have an array of functions in VHDL. You can have a function that
takes the current state as an argument (along with other inputs which are
usually necessary) and compute the next state but I don't think it will do
anything to make the code more readable since, although the code for the
state machine collapses right down to a simple function call, that code has
now moved verbatim over to some other function so the reader now is
redirected and you haven't really simplified or reduced the actual number of
lines of code. Just my 2 cents.
> Do you have any idea how to implement this approach in VHDL?
>
Functions and procedures are useful to use in several places (including
FSMs) so you're general path of investigating how to use them is good. Mike
Tressler's web site has several good examples to peruse that may give you
some ideas to build upon
http://home.comcast.net/~mike_treseler/
KJ