graphic representation of a vhdl project

This is a discussion on graphic representation of a vhdl project within the vhdl forums in Programming Languages category; Hi I have finished a VHDL project : an graphic adaptater with a FPGA. Now, I write the documentation and I search a tools able to build a graphic representation of architectures of entities of my project. I have try Doxygen, but Doxygen build only class diagram. To sum up, I search a tool as the function of FPGA advantage (lattice) which build a graphic representation of my design. ..marc...

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  #1  
Old 08-16-2008, 04:00 AM
marc
Guest
 
Default graphic representation of a vhdl project

Hi
I have finished a VHDL project : an graphic adaptater with a FPGA.
Now, I write the documentation and I search a tools able to build a
graphic representation of architectures of entities of my project.
I have try Doxygen, but Doxygen build only class diagram.
To sum up, I search a tool as the function of FPGA advantage (lattice)
which build a graphic representation of my design.
..marc
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  #2  
Old 08-16-2008, 11:57 AM
Mike Treseler
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Default Re: graphic representation of a vhdl project

marc wrote:

> To sum up, I search a tool as the function of FPGA advantage (lattice)
> which build a graphic representation of my design.


Most synthesis tools include an rtl viewer
I use this feature to browse a design and print
interesting levels to a pdf.

-- Mike Treseler
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  #3  
Old 08-16-2008, 01:02 PM
marc
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Default Re: graphic representation of a vhdl project

On Aug 16, 5:57 pm, Mike Treseler <mtrese...@gmail.com> wrote:
> marc wrote:
> > To sum up, I search a tool as the function of FPGA advantage (lattice)
> > which build a graphic representation of my design.

>
> Most synthesis tools include an rtl viewer
> I use this feature to browse a design and print
> interesting levels to a pdf.
>
> -- Mike Treseler


ok, good news and can you give me an example ?, actualy i use quartus
2 and modelsim.
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  #4  
Old 08-16-2008, 01:40 PM
Mike Treseler
Guest
 
Default Re: graphic representation of a vhdl project

marc wrote:

> ok, good news and can you give me an example ?, actualy i use quartus
> 2 and modelsim.


See the 'object' links here:
http://mysite.verizon.net/miketreseler/
You will need the licensed version of quartus.

-- Mike Treseler
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  #5  
Old 08-16-2008, 03:15 PM
marc
Guest
 
Default Re: graphic representation of a vhdl project

Excellent, thank you.
I use the web edition of quartus. I will test with an other version
because i have not found this options.

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