Very less resource fixed point 32x32 bit multiplier and 32/32 dividerThis is a discussion on Very less resource fixed point 32x32 bit multiplier and 32/32 divider within the vhdl forums in Programming Languages category; Hi all, I need to build an ASIC synthesizable fixed point 32x32 multiplier and fixed point 32/32 divider with very less hardware resource for my design.Speed is not at all a matter for me. I can space 100s of cycles for my computaions. Can anybody help me with the code (preferably in VHDL) or suitable references? Thanks, Pratap... | ||||||||
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#1
08-19-2008, 10:06 AM
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 Very less resource fixed point 32x32 bit multiplier and 32/32 divider Hi all, I need to build an ASIC synthesizable fixed point 32x32 multiplier and fixed point 32/32 divider with very less hardware resource for my design.Speed is not at all a matter for me. I can space 100s of cycles for my computaions. Can anybody help me with the code (preferably in VHDL) or suitable references? Thanks, Pratap  |
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#2
08-19-2008, 11:42 AM
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| Re: Very less resource fixed point 32x32 bit multiplier and 32/32divider Pratap wrote: > Hi all, > I need to build an ASIC synthesizable fixed point 32x32 multiplier and > fixed point 32/32 divider with very less hardware resource for my > design.Speed is not at all a matter for me. > I can space 100s of cycles for my computaions. > Can anybody help me with the code (preferably in VHDL) or suitable > references? > Thanks, > Pratap The first multi-cycle multiply/divide circuit was designed long ago, look at this report from 1946 : http://www.cs.unc.edu/~adyilie/comp265/vonNeumann.html You only need enough bits storage for the operands, 32+32 FF, as they are progressively replaced by computation results in 32+32 cycles. It's a tricky but clever technique. However, today, people use these techniques : http://www.andraka.com/multipli.htm Oh, and Wikipedia has some hints too : http://en.wikipedia.org/wiki/Multiplication_ALU yg |
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#3
08-21-2008, 05:06 PM
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| Re: Very less resource fixed point 32x32 bit multiplier and 32/32divider Pratap wrote: > Hi all, > I need to build an ASIC synthesizable fixed point 32x32 multiplier and > fixed point 32/32 divider with very less hardware resource for my > design.Speed is not at all a matter for me. > I can space 100s of cycles for my computaions. > Can anybody help me with the code (preferably in VHDL) or suitable > references? > Thanks, > Pratap > If speed isn't an issue, you could put in a small 8- or 16-bit microprocessor and small instruction ROM and let the C compiler take care of the floating point operations. -Kevin |
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#4
08-25-2008, 02:50 PM
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| Re: Very less resource fixed point 32x32 bit multiplier and 32/32divider Kevin Neilson wrote: > Pratap wrote: >> Hi all, >> I need to build an ASIC synthesizable fixed point 32x32 multiplier and >> fixed point 32/32 divider with very less hardware resource for my >> design.Speed is not at all a matter for me. >> I can space 100s of cycles for my computaions. >> Can anybody help me with the code (preferably in VHDL) or suitable >> references? >> Thanks, >> Pratap >> > If speed isn't an issue, you could put in a small 8- or 16-bit > microprocessor and small instruction ROM and let the C compiler take > care of the floating point operations. > -Kevin Sorry; I just noticed you said "fixed point" and not "floating point". If you've got lots of time, you can make a multiplier from a single adder and a divider from a single subtractor. Or if you wanted to be smaller, you could go down to a single two-bit full adder, or use bit-serial techniques. I would think, though, that in an ASIC, you have plenty of gates, and simple "*" will be nicely synthesized into a small core from the ASIC library. -Kevin |
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